1. Field of the Invention
The present invention relates to a memory system, and more particularly, the present invention relates to improving the signal integrity of a memory bus channel of a memory system having different types of memory modules, for example, a dual in-line memory module (DIMM) and a single in-line memory module (SIMM).
A claim of priority is made to Korean Patent Application No. 2002-45914, filed Aug. 2, 2002 and entitled “Memory System”, which is incorporated by reference herein in its entirety.
2. Description of the Related Art
A computer memory system is generally made up of a memory controller chip set, memory devices, resistive elements, and wires mounted on a computer main board. The wires electrically interconnect the memory controller chip set, the memory devices and the resistive elements, and a memory bus channel functions as a data or signal transmission line between the memory controller chip set and the memory devices. The memory devices are mounted on the main board in a modular fashion.
When mounted on the main board, the memory module acts as a load on the memory bus channel, thereby electrically deteriorating channel characteristics. For example, the bandwidth of the memory bus channel is narrowed due to the parasitic components of each device on the main board and resultant impedance mismatches. Further, signal integrity is deteriorated which results in signal distortion and signal modification, particularly when the memory system is operated at high speed.
It has been suggested to use a plurality of memory bus channel structures in an attempt to prevent deterioration of signal integrity in high speed memory systems. Among these channel structures, a stub type channel is widely used for a memory data query (DQ) channel. In the stub type channel structure, a series resistor or a parallel capacitor is provided between the memory controller chip set and a first memory module, and a channel stop resistor is provided at an end of the memory channel. The stub type channel structure reduces wave reflection resulting from impedance mismatches, thereby substantially decreasing channel noise and improving signal integrity.
The stub type channel structure, however, may not sufficiently improve signal integrity adapted in a memory system having both a dual in-line memory module (DIMM) and a single in-line memory module (SIMM). In such a memory system, the channel structure and a channel length are the same for both the DIMM and SIMM. However, since the DIMM and SIMM have differing loads, the delay times of the modules are not the same and therefore signals arrive at the modules at different timings.
That is, when compared to a memory system having one type of memory module, signal integrity of the stub type channel structure is degraded when adapted in a memory system having different types of memory modules, for example, both SIMMs and DIMMs. This is especially problematic in the case of memory systems operating at high speeds, where signal integrity is particularly important.